IEEE-488 GPIB Device Interface IC (Chip) for the µP-Bus

Features

• STD IEEE-488 capabilities SH1, AH1, T5/TE5 L3/LE3, SR1, RL1, PP1/PP2, DC1, DT1, C0
• Register Compatible to the NEC 7210
• 100-pin TQFP package
• 3.3V VCC, 5.0 VIO
• Microprocessor compatible asynchronous interface: CS#, RD#, WR#, RS0-3,
• D0-7, RESET#, INT, DRQ, DACK#
• requires only standard low-cost external parts to build a complete IEEE-488.2
• conformant device (Talker/Listener) GPIB interface

Description

Talker/Listener interface for instrumentation devices
Microprocessor Bus Interface with 5.0 VIO
NEC µPD7210 compatible register layout
100 pin TQFP package
RoHS conformant (Pb-free)

The i72110 GPIB-Chip is the ideal solution to implement a IEEE488.2 GPIB interface for instruments controlled by a microprocessor. The GPIB-ASIC is designed to meet all of the functional requirements for talker and listener (TL) devices as specified by the IEEE Standards 488.1-1987 and 488.2-1987. Connected between the microprocessor bus and the GPIB, the GPIB-IC provides high-level management of the GPIB to unburden the processor and to simplify both hardware and software design. The i72110 requires only the addition a few external components to implement a talker/listener GPIB interface.

Minimum Order Quantity (MOQ) is 10 pieces. Shipping is currently 10 weeks ARO.

Program / Software Information

The data sheet and data manual are available at:

http://www.inesinc.com/72110-gpib-products-en-com-std.html

Minimum Order Quantity (MOQ) is 10 pieces. Shipping is currently 10 weeks ARO.

PDF Manual

Download GPIB-72110 Manual

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